Semiconductor technologies are continually progressing to smaller feature sizes, for example down to feature sizes of 28 nanometers, 20 nanometers, and below. A patterned photoresist (PR) layer used to produce such small feature sizes typically has a high aspect ratio. Maintaining a desired critical dimension (CD) can be very difficult for various reasons, including incapability of shrinking the minimum area, degraded trench end resolution and sharp trench end shape being not fit the metal fill process.
Therefore, what is needed is a method and a photomask structure to provide effective IC design and fabrication for the advanced IC technologies addressing the above problems.